发明名称 HERSTELLEN VON ZWISCHENSCHICHT-LEITERBAHNEN IN INTEGRIERTEN SCHALTUNGEN.
摘要 A method of producing interlayer conductive paths having substantially planar top surfaces in a multilayer integrated circuit structure, comprising the steps of forming elements of either a conductive or semiconductive material as a lower layer, depositing an insulative layer on top of the lower layer elements, implanting ions into one or more selected regions of the insulative layer, forming at least one upper conductor over the selected regions and sintering the integrated circuit structure sufficient to render the selected regions conductive. The invention also embraces an integrated circuit structures with interlayer conductive paths made in accordance with this method.
申请公布号 AT112100(T) 申请公布日期 1994.10.15
申请号 AT19880907518T 申请日期 1988.06.09
申请人 MASSACHUSETTS INSTITUTE OF TECHNOLOGY 发明人 HERNDON, TERRY, O.;CHAPMAN, GLENN, H.
分类号 H01L21/3205;H01L21/768;H01L23/532;(IPC1-7):H01L23/50;H01L21/44 主分类号 H01L21/3205
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