发明名称 PHASE LOCKED LOOP DETECTING AND RECEIVING DEVICE
摘要 PURPOSE:To perform stable frequency detection even in the case of variation of received wave input level and to make low-noise detection possible without altering a circuit greatly by extracting a frequency detection output corresponding to a modulated wave input signal. CONSTITUTION:The received wave from a received wave input terminal 11 has its amplitude variation component removed by a limiter amplifier 1 and is inputted to a phase detecting circuit 2. The circuit 2 compares the phase or frequency of this input signal with that of the output of a voltage-controlled oscillator VOC3 which inputs the output of the circuit 2 and controls the oscillation frequency and outputs their difference signal. Then the phase or frequency locked signal of the circuit 2 is demodulated by a demodulating circuit 6 and outputted. Thus, the VCO3 performs control to be the same frequency as the inputted reception frequency and the output of the VCO3 is taken out through a buffer amplifier circuit 4A without exerting any influence on the operation of the whole device and then the reception frequency can be detected and outputted to a frequency detection terminal 13.
申请公布号 JPH06284030(A) 申请公布日期 1994.10.07
申请号 JP19930087821 申请日期 1993.03.24
申请人 MITSUBISHI ELECTRIC CORP 发明人 TAKAMOTO ATSUSHI
分类号 G01R23/02;H03L7/08;H04B1/10;H04B1/16 主分类号 G01R23/02
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