| 摘要 |
PURPOSE:To suppress the height and maximum inclined angle of a step area between a memory cell array area and peripheral circuit area even when charge storage electrodes are formed tall. CONSTITUTION:After forming a gate electrode 5 on a semiconductor substrate as a word line and side-wall insulating films 7 on both sides of the electrode 5, a first insulating film 8 is deposited on the entire surface of the substrate. After forming openings for bit lines through the film 8, bit lines 9 having upper insulating films 10 are formed in the openings for bit lines and a second insulating film 11 is deposited on the entire surface of the substrate. Then openings 13 for charge storage electrodes are formed in the first and second insulating films 8 and 11 by removing prescribed parts of the films 8, 10, and 11 existing in an memory cell array area by a prescribed thickness. Thereafter, charge storage electrodes 14 are deposited in the openings 13. |
