发明名称 Memory module with parity bit emulation.
摘要 A memory module, parity bit emulator, and method which emulate storing and retrieving a parity bit from memory. The memory module includes a memory for storing a data word which is retrieved from the memory during a read cycle. The memory module also includes a parity bit generator. The parity bit generator is responsive to the retrieved data word and generates a corresponding parity bit during the read cycle. The inversion saves substrate space by not having to physically store a parity bit. <IMAGE>
申请公布号 GB2276744(A) 申请公布日期 1994.10.05
申请号 GB19940008583 申请日期 1994.04.29
申请人 EDMUND YICK WANG * KONG 发明人 EDMUND YICK WANG * KONG
分类号 G06F11/10;(IPC1-7):G06F11/10 主分类号 G06F11/10
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