发明名称 FLASH ERASABLE NONVOLATIE MEMORY
摘要 <p>PURPOSE:To shorten time required for erasing operation, in the case where the existence of a memory cell with an erasing defect is confirmed, by starting a re-erasing and verifying operation from the address stored in a storage part. CONSTITUTION:When the threshold voltage of the cell area with erasing performed in a memory cell and a cell part 4 is lowered, a read-out confirmation whether the erasing is normally finished or not is performed by an erase comparator 5. An address to confirm the read-out is given to the cell part 4 by an internal address part 1; and by receiving this address, the selection of a cell 4 in the memory cell 4 is performed by a decoder part 3. Then, the address in the memory cell with the erasing defect is stored in a storage part 2 for the address with erasing defects. After that, a verifying operation besides erasing is started from the defective address stored in the storage part 2. Thus, the time for erasing operation including erasing and/or erasing and verifying is shortened.</p>
申请公布号 JPH06259977(A) 申请公布日期 1994.09.16
申请号 JP19930041626 申请日期 1993.03.03
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 FUCHIGAMI KEISUKE
分类号 G11C17/00;G11C16/02;G11C16/08;G11C16/16;G11C16/34;(IPC1-7):G11C16/06 主分类号 G11C17/00
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