发明名称 Multiple module block matching architecture.
摘要 A circuit implementation of a block matching algorithm comprises a plurality of modules. Each module is a one-dimensional systolic array. The modules can be connected in tandem to increase the power of computation so that the best match of a current block in a search window can be obtained more rapidly without increasing the number of input ports. In accordance with an alternative embodiment of the invention, the modules can be connected in tandem so as to enable the size of the search window to be increased. <IMAGE>
申请公布号 EP0613293(A2) 申请公布日期 1994.08.31
申请号 EP19930115028 申请日期 1993.09.17
申请人 INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE 发明人 LIN, VINCENT M.S.;LEE, FOO-MING
分类号 G06T7/20;H04N5/14;H04N7/26 主分类号 G06T7/20
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