发明名称 DOWN CONVERTER DEVICE
摘要 <p>PURPOSE:To simplify the circuit constitution of a down converter device by using the clock selected by a selector means as a reading clock of a time base conversion memory which converts the TV signal rate of high precision into a standard TV signal rate. CONSTITUTION:In regard of a color difference signal, the TV signal rate of high precision is converted into a standard TV signal rate by a FIFO memory of a color expanding circuit 13 and then supplied to a line sequential decoding part 10. The part 10 consists of the line memories 14 and 15, an adder 16, and a selector circuit 17 and interpolates a color difference signal in the vertical direction. This interpolated color difference signal is supplied to a blanking circuit 18. The circuit 18 blanks a luminance signal Y and two types of color difference signals R-Y and B-Y at each part including a color difference signal period when these signals are read out of a time base conversion memory 12. Then the blanked signals are supplied to the D/A converters 19, 20 and 21 which supply these luminance and color difference signals to an NTSC encoder which converts these signals into the analog signals.</p>
申请公布号 JPH06233324(A) 申请公布日期 1994.08.19
申请号 JP19930015215 申请日期 1993.02.02
申请人 SHARP CORP 发明人 YAMAMOTO HIROAKI
分类号 H04N7/01;H04N11/20;(IPC1-7):H04N11/20 主分类号 H04N7/01
代理机构 代理人
主权项
地址