| 摘要 |
PURPOSE:To decrease the number of gates constituted, to reduce the number of terminals and to lower power consumption by connecting a plurality of latch circuits to a data transmission line supplied with a serial data signal and successively commanding the taking-in of data to the latch circuits. CONSTITUTION:Each bit of the serial data signal of four bits, etc., is fed in serial through each of data transmission lines LNA-LND, and latched to D latch circuits LA1-LA4 by a command by a latch command circuit 501a formed by a D type FF and AND gates D1 and G1. Likewise, four bit data are latched successively to LA5-LA8 and LA9-LA12, and output in parallel. Accordingly, a cyclic latch is formed, and a shift register requiring the D type FF and the AND gate and the like may not be used, thus manufacturing a data shifter, in which the number of gates constituted is decreased, the number of terminals is reduced and power consumption is reduced. |
