Station interface unit

摘要

An improved interface unit for receiving a stream of parallel bit words from a source bus comprising an address field, a data field and a clock field. The parallel bit words are first phase adjusted and stored in an input register where the address field is compared in enable logic to determine whether to store the data field in a sink buffer register for processing. The word in the input register is coupled to the buffer storage register. The address field is further compared in pass through disable logic to determine whether to pass the address and data field to an output register or to generate a null code address in the address field of the word being outputted from the buffer storage register. The word in the buffer storage register is coupled through a word selector to an output register. A host source is also coupled to the word selector so that a source word may be written into the output register when a null code address is appended to a parallel bit word being supplied as an input to said word selector.