| 摘要 |
<p>PURPOSE:To reduce an input setup time and an output delay time by gathering pads where the same data buses are wired in the vicinity. CONSTITUTION:This microprocessor is provided with the microprocessor 1, the data bus 2 to calculate, the pads 4a to 41, data bus interfaces 3a to 31 and data buses 20 to 31 connected from the data bus interfaces 3a to 31 to the data bus 2. The microprocessor 1 is provided with the data businterface circuits 3a to 31 which is provided with external and internal data buses of 2<n> bit width ('n' is a natural number), can use the external data bus as the bus of 2<m> bit width ('m' is a natural number and 'm'<'n') and is provided with an align function for bus sizing in the vicinity of the pads connected to the external data buses. Furthermore, the microprocessor 1 arranges the (2<n-m>) pieces of pads 4a to 41 which are the object of output from the same internal data bus and a data bus interface circuit 3a to 31 by gathering them in the vicinity.</p> |
