发明名称 PACKET SWITCHING SYSTEM
摘要 <p>PURPOSE:To eliminate a need of contention control and to improve the efficiency furthermore by increasing the internal operation speed of a self-routing multistage switch n times and providing buffers on the output side also and always routing one packet in a routing network. CONSTITUTION:After packets from input ports 100 to 103 are temporarily stored in input buffers 110 to 113, they are inputted to a routing network 121 when timing signals T1 to T4 of a timing generator 150 are in the high level. The network 121 is a banyan network consisting of unit switches 4 with output selecting function and constitutes a self-routing multistage switch 120, and input packets are routed and outputted at n-fold arrival speed (n=4 in this example) Output packets are stored in output buffers 130 to 133 and are sent to output ports at the same speed as input to input ports. Thus, contention control is unnecessary, and the efficiency is improved furthermore.</p>
申请公布号 JPH06216941(A) 申请公布日期 1994.08.05
申请号 JP19930005179 申请日期 1993.01.14
申请人 OKI ELECTRIC IND CO LTD 发明人 KAJIMA SHIGETAKA;HAYASHI KENTARO
分类号 H04L12/56;(IPC1-7):H04L12/56 主分类号 H04L12/56
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