发明名称 SEMICONDUCTOR STORAGE DEVICE
摘要 PURPOSE:To restrict the resistance of a bit line practically within a small value when the bit line itself is formed of a wiring layer of high resistance, by backing the bit line with a low resistance wiring for baking. CONSTITUTION:Wirings for backings SL0, SL0*, SL1, SL1*... are arranged parallel to bit lines DL0, DL0*, DL1, DL1*... which form bit line pairs. The wirings for backing are formed by using wiring layers of material whose resistance is at least lower than those of the bit lines. The wirings for backing come into contact, in specified positions 13 (BC), with the bit lines which correspond to the wirings for backing. Since the bit lines formed in a wiring layer of high resistance are subjected to backing by using the baking wirings, the resistance value of the bit lines are practically reduced. Low resistance material A has a resistance which is 1/10 to 1/100 of that of a high resistance wiring material (silicide). For example, the time necessary for rewriting can be reduced by several nano seconds, in the case of bit line shunt structure wherein four contacts are used for one bit line.
申请公布号 JPH06216341(A) 申请公布日期 1994.08.05
申请号 JP19930004684 申请日期 1993.01.14
申请人 HITACHI LTD 发明人 ISHII KYOKO
分类号 H01L21/3205;G11C11/401;H01L21/8242;H01L23/52;H01L27/10;H01L27/108 主分类号 H01L21/3205
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