发明名称 SYNCHRONOUS DETECTION CIRCUIT
摘要 PURPOSE:To improve the transmission efficiency of a burst signal after multiplying an input signal by a carrier wave reproduced from this signal, and subjecting the resultant signal to A/D conversion, inputting this converted signal and discrimination symbol series candidates of a discrimination circuit and selecting and outputting a maximum likelihood value from among prepared remodulated signal series candidates. CONSTITUTION:The signal obtained by multiplying the signal of an input terminal 1 at which a burst signal arrives, by the carrier frequency signal, which a carrier frequency reproducing circuit 8 reproduced from this signal, in a multiplier 3 is outputted through an LPF 4. This signal is converted by an A/D conversion circuit 11 and is inputted to a branch metric operation circuit 12, and series candidates of a discrimination symbol are branched and inputted to the circuit 12 from a discriminating circuit 5. The circuit 5 uses a Viterbi algorithm to select and output the symbol series candidate for which the output power of the circuit 12 is minimum, as a maximum likelihood value from remodulated signal series candidates which the circuit 12 prepares by operation based on both inputs. Thus, the transmission efficiency of the burst signal is improved, and the phase synchronizing circuit of a reception equipment is unnecessary.
申请公布号 JPH06216960(A) 申请公布日期 1994.08.05
申请号 JP19930007946 申请日期 1993.01.20
申请人 N T T IDOU TSUUSHINMOU KK 发明人 FUKAWA KAZUHIKO;SUZUKI HIROSHI
分类号 H03L7/095;H04J3/00;H04L27/22;H04L27/227;H04L27/38 主分类号 H03L7/095
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