SEMICONDUCTOR IC HAVING TEST CIRUCIT FOR MEMORY

摘要

The circuit is for reducing the time and cost of circuit test of the semiconductor memory devices by the formation of FET channel and transmission line of the test circuit using polysilicon layer or amorphous silicon layer. The test circuit consists of two transition transistors (F11)(F12), a writing circuit, two sense amps and an output test circuit. The transistors are manufactured in the thin film transistor type of which the channel is made of intrinsic polysilicon and the source and the drain is made of the polysilicon which is doped with conductive impurity.