发明名称 PULSE WIDTH MODULATING CIRCUIT
摘要 PURPOSE:To make it possible to output an output pulse with a period longer than a clock period without extending the clock period by generating an output pulse by a control pulse delayed in accordance with a selected reference position. CONSTITUTION:A reference position to be a reference for the generation of an output pulse PWM is selected out of plural reference positions CP, LP, RP in each clock period T and a control pulse CLKP delayed in accordance with the selected reference position (e.g. LP) is inputted to the set and reset input terminals of a latch means 5. Thus the reference position to be a reference for the generation of the output pulse PWM is selected out of the plural reference positions CP, LP, RP and the output pulse PWM is generated by control pulses S3, S4 delayed in accordance with the selected reference position LP. Consequently the output pulse PWM with a period longer than the clock period T can easily be obtained.
申请公布号 JPH06204825(A) 申请公布日期 1994.07.22
申请号 JP19920360616 申请日期 1992.12.30
申请人 SONY CORP 发明人 YOSHIDA HIDEKI;MURAKAMI DAISUKE
分类号 B41J2/44;B41J2/47;H03K5/13;H03K5/131 主分类号 B41J2/44
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