Reduced noise, low power, high speed output buffer

摘要

A reduced noise, low power, high speed output buffer circuit is provided for driving a load. The output buffer circuit utilizes multiple stage pull-up and pull-down transistors. During the time in which the first stage pull-down (or pull-up) transistor is activated, all of the opposing pull-up (or pull-down) transistors are deactivated at substantially the same time. Thereafter, the remaining stages of pull-down (or pull-up) transistors are activated. Delayed turn on in conjunction with rapid turn off achieves low overshoot and undershoot noise transient levels at the power supplies.