| 摘要 |
PURPOSE:To suppress the decrease of valid digits in data in the case of performing bit shift in high-accuracy digital signal processing. CONSTITUTION:Input data Si composed of 12 bits are divided into high-order 8 bits HB and low-order remaining 4 bits LB by a bit divider 1, and the high- order 8 bits HB are shifted just for required bits by a shifter 2 as they are, extended and turned to H12 corresponding to the format of the input data. The loworder remaining 4 bits LB are inputted to a bit selector 3. In this case, the bit selector 3 outputs the most significant bit of the low-order 4 bits LB as a carry output C12. The carry output C12 is added with the H12 by an adder, and final output data So are outputted. |
