发明名称 TRANSFER SYSTEM IN ASYNCHRONOUS TRANSFER MODE
摘要 <p>PURPOSE:To reduce a fault restoration time and to attain error correction and cell abort compensation with high reliability. CONSTITUTION:A virtual path VP1 is formed by adding control information based on an error correction code rule and a cell sequence number to each cell of input virtual line groups VC11-VC14 by a sender side virtual line switch VCH1, the virtual path is copied to generate a virtual path VP2 and the two virtual paths are connected to a receiver side virtual line switch VCH 2 via virtual line path cross connectors VPH1-VPH3 in a different route. The receiver side virtual line switch VCH2 applies buffering to cells of the virtual paths VP1,VP2 and implements cell abort compensation by a cell sequence number for error correction.</p>
申请公布号 JPH06181471(A) 申请公布日期 1994.06.28
申请号 JP19920333244 申请日期 1992.12.14
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 KIKKAI NORIAKI;YOSHIDA OSAMU;FUJII HIROYUKI;KURAGAMI HIROSHI
分类号 H04L1/00;(IPC1-7):H04L12/48 主分类号 H04L1/00
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