| 摘要 |
<p>PURPOSE: To highly integrate and accelerate EPROM, EEPROM, etc., by reducing the number of connection to a bit line consisting of parallel metallic wires so as to minimize the resistance and the capacitance of the bit line. CONSTITUTION: Segment selecting transistors 150, 160,... are alternately connected to respective segment bit lines 124 and 126 from the upper parts to the lower parts of segment arrays 100 and 110. The respective transistors 150, 160,... are connected to buried metallic wires 134 and 136 through metallic contact between the two arrays 100 and 110. The respective metallic wires 134 and 136 are parallelly connected to the corresponding bit lines 124 and 126 and are mutually insulated. Each metallic contact point 142 in the two arrays 100 and 110 is divide-shared from one connectable by the proximate transistors 150, 160... by the bit lines 124 and 126. Thereby each transistor 150, 160... can take the double pitch of a bit line.</p> |
