| 摘要 |
PURPOSE:To easily diagnose a FIFO buffer formed inside an integrated circuit in a short time. CONSTITUTION:At the time of a diagnostic mode, a diagnostic signal Sd is supplied to an input terminal 102. A mode setting signal Sm for setting the diagnostic mode or a normal mode is supplied to an input terminal 103. Input switching circuits 21-24 are provided on the input side of flip-flops 11-14 constituting a FIFO buffer 10. When the mode setting signal Sm shows the diagnostic mode, the input switching circuits 21-24 select the diagnostic signal Sd and when the normal mode is shown, the flip-flops 11-14 are serially connected. An AND circuit 30 ANDs output signals S1-S4 from the respective flip-flops 11-14 and outputs the result as a signal Sa. An OR circuit 40 ORs output signals from the flip-flops 11-14 and outputs the result as a signal Sb. An arithmetic result switching circuit 50 selects either of the signals Sa and Sb corresponding to the diagnostic signal Sd. |
