发明名称 Wire interconnect structures for connecting an integrated circuit to a substrate.
摘要 <p>An interconnect structure for connecting an integrated circuit (IC) chip (70) to a supporting substrate is described. The supporting substrate serves to communicate signals between the IC chip (70) and the "outside world," such as other IC chips. In one embodiment, the interconnect structure comprises an interconnect substrate having a first post (14) disposed on one of its surfaces (13) and a second post (80) disposed on another of its surfaces. One post is for contacting the IC chip and the other is for contacting the major substrate. Each post comprising an elongated body having top (18) and bottom ends (17), with the bottom end being mounted to one of the substrate surfaces (13) and the top end (18) having a substantially flat surface which is substantially co-planer with the substrate surface. The interconnect substrate further comprises a means (22) for de-concentrating the mechanical stain present at one or both of the top and bottom ends of each post. The first and second posts are electrically coupled to one another so that an electrical signal may pass from IC chip to the supporting substrate, and vice-versa.</p>
申请公布号 EP0602328(A2) 申请公布日期 1994.06.22
申请号 EP19930115097 申请日期 1993.09.20
申请人 FUJITSU LIMITED 发明人 LOVE, DAVID GEORGE;MORESCO, LARRY LOUIS;CHOU, WILLIAM TAI-HUA;HORINE, DAVID ALBERT;WONG,CONNIE MAK;BEILIN, SOLOMON ISAAC
分类号 H01L21/48;H01L21/60;H01L23/32;H01L23/485;H01L23/498;H05K1/11;H05K3/24;H05K3/34;H05K3/40;(IPC1-7):H01L21/60 主分类号 H01L21/48
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