发明名称 Layered capacitor structure for a dynamic random access memory device
摘要 An improved method and resulting structures for producing a layered capacitor structure of memory cell of a DRAM device wherein a doped polysilicon spacer operates as a dopant source for an overlying polysilicon layer on the vertical and sharply inclined surfaces.
申请公布号 US5323037(A) 申请公布日期 1994.06.21
申请号 US19930042642 申请日期 1993.04.05
申请人 INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE 发明人 SU, WEN-DOE
分类号 H01L21/02;H01L21/8242;(IPC1-7):H01L21/70 主分类号 H01L21/02
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