发明名称 BONDING PAD STRUCTURE FOR SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To prevent contact between a wire and a semiconductor substrate that exposes itself at diecing by assigning a dummy pad near the end part of a semiconductor substrate so as to provide with the second insulation layer that covers an electrode layer and the dummy pad. CONSTITUTION:Around a semiconductor substrate 11, a bonding pad 13 is formed, with a silicon oxide layer 12 in between, and at the same time, a dummy pad 14 is, while adjacent to the bonding pad 13, formed at the end part of the semiconductor substrate 11. The bonding pad 13 and the dummy pad 14 are farmed at the top layer wiring connected to a circuit element ordinary formed by laminating aluminum. A silicon nitride layer 15, covering the bonding pad 13 and the dummy pad 14, layer is formed at a surface protection film. The silicon nitride 15 rises over the dummy pad 14, so as to support a wire 18 connected to the banding pad 13. Thus, a contact between the hanging wire 18 and the end part of the semiconductor substrate 11 is prevented.
申请公布号 JPH06163629(A) 申请公布日期 1994.06.10
申请号 JP19920317542 申请日期 1992.11.26
申请人 SANYO ELECTRIC CO LTD 发明人 YAMAMURA RYUJI
分类号 H01L21/60 主分类号 H01L21/60
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