摘要 |
<p>The device (particularly, a flash memory) has a first unit (101, 102, 120) for simultaneously selecting a block of 2<m> word lines among 2<n> word lines (n>m), and a second unit (101, 102, 120) for not selecting a block of 2<k> word lines among the 2<m> word lines (m>k). The second unit (101, 102, 120; 120, 130) does not select the block of 2<k> word lines, and selects a block of 2<k> word lines prepared outside the 2<n> word lines when any one of the 2<k> word lines among the 2<m> word lines is defective. Consequently, redundant word lines are effectively employed, write and verify operations are stable, and thereby the yield and performance of the device are improved. Further features of the device can include means for supplying a write drain voltage to a cell transistor independent of the threshold voltage of a write voltage supply transistor, to enable correct writing with a low write voltage; means for saving overerased cell transistors to correctly read data; means for simultaneously erasing a plurality of blocks of cells and easily verifying the same; a simple decoder circuit achieving full selection and non-selection of word or bit lines in a test mode, and other features. <IMAGE></p> |
申请人 |
FUJITSU LIMITED |
发明人 |
AKAOGI, TAKAO;TAKASHINA, NOBUAKI;KASA, YASUSHI;ITANO, KIYOSHI;KAWASHIMA, HIROMI;YAMASHITA, MINORU;KAWAMURA, SHOUICHI |