| 摘要 |
An apparatus for altering the operating clock frequency of a computer system comprises an input port, a plurality of output ports, and instructing means coupled together by a bus. Latching means and gating means are coupled to CPU and the output ports to control the clock signal received. The input port receives a change frequency signal. In response, the CPU executes the instructions from the instructing means to store the contents of the CPU's internal registers into memory. The CPU then generates a frequency select signal and a reset signal that resets itself. The latch means stores and outputs the frequency select signal to the gating means. The gating means uses the frequency select signal to output one of a plurality of different frequency clock signals received at its select input as the operating clock input of the CPU. The CPU thereafter operates under the newly gated clock signal. After the CPU reset is complete, the CPU reloads its internal registers with the information stored within the memory.
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