发明名称
摘要 <p>PURPOSE:To reduce power consumption and to easily form an integrated circuit by constituting a power ON preset circuit only of plural field effect transistors (FETs). CONSTITUTION:The power ON preset circuit is constituted of the 1st part 10 consisting of FETs 20-24 and the 2nd part 15 consisting of FETs 31-35. When supplied power VDD is impressed to a latching register, the power is supplied also to the parts 10, 15 between terminals 25, 26. When an input 20 to which an enable signal is supplied is held at a logically low state at the time of supplying the power, the logically low state is supplied to an AND gate 40 to initialize the latching register. When a logically high pulse is inputted to the input 27, an output 36 is turned to a logically high state and held at the state, so that the preset circuit is effectively turned to an undriven state.</p>
申请公布号 JPH0642187(B2) 申请公布日期 1994.06.01
申请号 JP19880121841 申请日期 1988.05.20
申请人 MOTOROLA JAPAN 发明人 TSUJI MASATO
分类号 G06F1/24;G06F1/00;(IPC1-7):G06F1/24 主分类号 G06F1/24
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