发明名称 MEMORY CHIP SELECTION CONTROL CIRCUIT
摘要 <p>PURPOSE:To miniaturize a single chip microcomputer-mounted substrate and to omit the pins of an IC package without requiring any address decoder for chip selection signal generation and any dedicated output terminal for a chip selection signal for selecting an external memory chip from a single chip microcomputer. CONSTITUTION:An address decode circuit 8 is built in a single chip microcomputer 1 and generates a chip selection signal 9 from an address signal 7 for generating the chip selection signal of the external memory chip, and a switching circuit 11 selectively outputs an address signal 10 for specifying an access address inside the external memory chip and the chip selection signal 9 from an address/chip selection terminal 12 while switching the outputs of the chip selection signal 9 and the address signal 10.</p>
申请公布号 JPH06150022(A) 申请公布日期 1994.05.31
申请号 JP19920298645 申请日期 1992.11.09
申请人 MITSUBISHI ELECTRIC CORP 发明人 DOI YOSHINORI
分类号 G06F15/78;(IPC1-7):G06F15/78 主分类号 G06F15/78
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