| 摘要 |
PURPOSE:To provide the drift detection circuit easily detecting a drift even in a phase locked loop in which the frequency of an input clock and the frequency of an output clock are the same. CONSTITUTION:The circuit is made up of a frequency divider A20 applying 1/N frequency division to an input clock 1 inputted to a PLO 10 and counting the divided clock up to an N value, a bit buffer section 30 receiving an H level of an N-value count pulse 3 from the frequency divider A20, the input clock 1 and the output clock 2 and generating an H level of an n-value pulse 4 with a delay of a prescribed clock number from an H level of the N-value count pulse 3, a frequency divider B40 applying 1/N frequency division to the output clock 2 and outputting count data 5 for each clock, a latch section 50 lathing the count data 5 from the frequency divider B40 upon the receipt of the H level of the n-value pulse 4 and sending the latched data to a comparator section as count data 6, and a comparator section 70 sending an alarm output signal when the H level of the n-value pulse 4 is received and the inputted count data 5, 6 differ from each other. |
