发明名称 |
SIGNAL PROCESSING CIRCUIT |
摘要 |
PURPOSE:To reduce the entire circuit scale by decreasing the capacity of a frame memory used to restore a reflected component between frames to the original component in the signal processing circuit decoding a signal of the MUSE system in a still picture area so as to reduce the capacity of a frame memory. CONSTITUTION:A harmonic component including a reflected component between frames is split from an inputted MUSE system signal by a band split filter 9 and the sampling frequency of the harmonic component to be split is decreased from 16.2MHz into 8.1MHz by an interleave circuit 10. Then an output of the interleave circuit 10 is stored in a frame memory by one frame with respect to a frequency of 8.1MHz and delayed by one frame and the delayed signal is subject to in-frame interpolation processing to a harmonic component outputted from the band split filter 9. |
申请公布号 |
JPH06133276(A) |
申请公布日期 |
1994.05.13 |
申请号 |
JP19920279814 |
申请日期 |
1992.10.19 |
申请人 |
SHARP CORP |
发明人 |
TAKEE KUNIMATSU;YAMAMOTO HIROAKI |
分类号 |
H04N7/015;H04N7/00;H04N19/00;H04N19/423;H04N19/426;H04N19/59;H04N19/635;H04N19/80 |
主分类号 |
H04N7/015 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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