发明名称 |
Data demultiplexer for decoding video data - generates signals to control decoding operations with control circuit supplied by video synchronising signal generator |
摘要 |
A data demultiplexer (5), for use in the decoding of video data, has a data separator (21), a data time stamp video register (22), a data time stamp audio register (24), a system clock register (31), a system time clock register (26), a control circuit (28) and three comparators (23, 25, 32). The comparators provide gating of the registers dependent upon the timing signals. Outputs are provided to start the de-multiplexing cycle and the video and audio decoding operations. The control circuit receives an input from a video synchronising signal generator coupled to the video decoding stage. ADVANTAGE - Avoids distortion of video synchronising signal.
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申请公布号 |
DE4335271(A1) |
申请公布日期 |
1994.05.05 |
申请号 |
DE19934335271 |
申请日期 |
1993.10.15 |
申请人 |
SONY CORP., TOKIO/TOKYO, JP |
发明人 |
FUJINAMI, YASUSHI, TOKIO/TOKYO, JP |
分类号 |
H04N5/93;H04N5/926;H04N5/935;H04N7/08;H04N7/081;H04N21/2368;H04N21/434;(IPC1-7):G11B15/087;H04N5/92 |
主分类号 |
H04N5/93 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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