发明名称 |
Power on reset circuit. |
摘要 |
<p>A power on reset circuit (10) uses a first inverter (16-26) with hysteresis operating in response to a first power supply potential (12) to develop a first reset signal when the first power supply potential is greater than a first predetermined threshold. A second inverter (46-56) with hysteresis also operates in response to the first power supply potential for developing a second reset signal when the first power supply potential is greater than a second predetermined threshold. The first reset signal disables the second inverter until the first power supply potential reaches the first predetermined threshold. A delay circuit (70-100) delays the second reset signal to ensure the first power supply potential is fully operational before indicating a ready condition. <IMAGE></p> |
申请公布号 |
EP0594967(A1) |
申请公布日期 |
1994.05.04 |
申请号 |
EP19930113636 |
申请日期 |
1993.08.26 |
申请人 |
MOTOROLA, INC. |
发明人 |
ATRISS, AHMAD H.;PETERSON, BENJAMIN C.;PARKER, LANNY L. |
分类号 |
G06F1/24;H03K3/3565;H03K17/22;(IPC1-7):H03K17/22 |
主分类号 |
G06F1/24 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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