发明名称 OUTPUT BUFFER CIRCUIT
摘要 PURPOSE:To provide an output buffer circuit which can be easily designed and has high working speed and a low noise level. CONSTITUTION:A level sense circuit 103 detects that an output terminal OUT is set at a low level in a switching period when the terminal OUT is changed to a low level from a high level. Thus an AND gate 104 outputs a low level and an n-channel MOSFET 105 becomes non-conductive. Then the effective transistor size of a MOSFET which drives the terminal OUT is reduced and therefore the current flowing to a GND supply wiring is reduced. Thus the noises produced in the GND wiring can be suppress without deteriorating the high speed performance of a buffer and despite the reduction of the switching speed when the terminal OUT is set at a level close to the GND potential.
申请公布号 JPH06120802(A) 申请公布日期 1994.04.28
申请号 JP19920264723 申请日期 1992.10.02
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 KUSANO TAKAO
分类号 H03K17/04;H03K17/16;H03K19/003;H03K19/0175 主分类号 H03K17/04
代理机构 代理人
主权项
地址