| 摘要 |
PURPOSE:To reduce the circuit scale by selecting a clock inputted to a shift register and operating the shift register in the continuous digital signal compression and expansion system. CONSTITUTION:When a SW1 is at a high level, a continuous signal is stored in a shift register 1, shift registers 2, 3 are connected and a high speed clock (1) is inputted to send a burst signal. When a SW2 is at a high level, shift registers 4, 6 are connected, a high speed clock (2) is inputted to receive a burst signal. When a SW2 is at a low level, the low speed clock (2) is inputted to the shift registers 4,6 and an expanded signal is outputted from a point (g).
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