Synchronous static random access memory.

摘要

Maximum operating speed is achieved in an array of memory cells by performing both read and write operations within a single memory cycle. As outgoing data are read from the memory cells, incoming data are stored immediately in those cells. Once data are read from the memory cells, a latch signal is generated (in 32) to trigger latching (in 34) of the read data for output to a data bus (14). The same latch signal that is used to latch the read data initiates (in 36) the writing of new data to the memory cells. Use of a single latch signal in this manner ensures that new data are not written to the memory cells until the existing data has been read from those cells. <IMAGE>