| 摘要 |
<p>A semiconductor memory device provided with an improved word line drive circuit is disclosed. The memory device comprises a pair of decoding units, a plurality of word lines, a plurality of N-channel transistors coupled between first ends of the word lines and the output terminal of one of the pair of decoding unit, and a plurality of P-channel transistors coupled between second, opposite ends of the word lines and the output terminal of the other of the pair of decoding units.</p> |
