发明名称 |
System zur Prüfung von Belichtungsmusterdaten von halbleiterintegriertem Schaltungsgerät. |
摘要 |
A system (1) for inspecting exposure pattern data in the form of coordinate data for forming a reticle of a semiconductor integrated circuit device, on the basis of video signals. The inspection system includes a unit for inputting exposure pattern data in the form of coordinate data form in response to a request for a test region, converting the input exposure pattern data to data corresponding to an actual pattern in a two-dimensional form, storing the converted data, and outputting the stored data in the form of video signals; a unit for testing the exposure pattern data from the inputting and converting unit on the basis of the video signals under a predetermined pattern rule; and a unit for outputting data tested at the pattern testing unit. …<??>The pattern test unit includes a variety of test circuits, such as a slit test circuit, a comparator, a combination circuit, etc., used for a pattern test. |
申请公布号 |
DE3689718(D1) |
申请公布日期 |
1994.04.21 |
申请号 |
DE19863689718 |
申请日期 |
1986.11.25 |
申请人 |
FUJITSU LTD., KAWASAKI, KANAGAWA, JP |
发明人 |
MATSUI, SHOGO, SAGAMIHARA-SHI KANAGAWA 228, JP;SHIOZAWA, KUNIHIKO, YOKOHAMA-SHI KANAGAWA 227, JP;KOBAYASHI, KENICHI, TOKYO 171, JP |
分类号 |
H01L21/66;G01B11/00;G01B11/02;G01B11/24;G01N21/93;G01N21/956;G03F1/00;G03F1/84;G06T7/00;H01L21/027;H01L21/30 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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