发明名称 Data transfer system
摘要 A data bus has a bit length of 2 words, and is divided into two bit groups, each of which corresponds to one word. Therefore, the data bus can simultaneously transfer data of two words. A register, a data operation part of a CPU, a RAM and a ROM is connected to the data bus. Even if there is generated data of two words to be transferred in these registers, the data operation part, the RAM and the ROM, the data bus can simultaneously transfer the data. In order to prevent conflict of data on the data bus, there are provided a bus driver, a multiplexer and a bus selector.
申请公布号 US5303353(A) 申请公布日期 1994.04.12
申请号 US19920862660 申请日期 1992.04.01
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 MATSUURA, YOSHINORI;URAMOTO, SHINICHI;MATSUMURA, TETSUYA
分类号 G06F13/28;G06F13/38;G06F13/40;(IPC1-7):G06F13/38 主分类号 G06F13/28
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