发明名称 |
AUTOMATIC CALIBRATION TYPE CLOCK SYNTHESIZER |
摘要 |
<p>PURPOSE: To maintain a synchronous state for a long time by tracing a reference signal regardless of temperature, voltage and process fluctuations and therefore generating plural clock signals which synchronize with a reference clock. CONSTITUTION: A processor unit 12 which operates in response to clock signals that are given from a clock generator 14 generates various control signals which are sent to a control/controlled logic 18 via a multiple signal line bus 16. On the other hand, the unit 12 generates a periodic clock signal (SYSOUT) and sends it to a clock synchronizer 20 as a reference system clock. The synchronizer 20 receives the clock signal from the generator 14 and generates many clock signals (SYSCLK-OUT) serving as the synchronous replicas of the SYSOUT. These clock signals are sent to the logic 18 and perform the clocking and synchronous functions of a circuit which is included in the logic 18.</p> |
申请公布号 |
JPH0695757(A) |
申请公布日期 |
1994.04.08 |
申请号 |
JP19910009089 |
申请日期 |
1991.01.29 |
申请人 |
TANDEM COMPUT INC |
发明人 |
CHIERIIRO RINO KONSUTANCHINO;DEIBUITSUDO PII CHIENGUSON;DATSUKU ENU RII;ROODOSON ERU YUU;AURANGUZEBU KEI KAAN |
分类号 |
G06F1/12;G06F1/10;H03K5/00;(IPC1-7):G06F1/12 |
主分类号 |
G06F1/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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