| 摘要 |
PURPOSE:To realize high density multilayer board while increasing freedom in the design of circuit pattern by reducing the number of gold plated leads required for formation of a gold plated layer in an interstitial via hole. CONSTITUTION:After drilling a prepreg 4 interposed between a set of interstitial via holes(IVH), the pair of IVHs 6 are connected electrically through plating. A plating lead is led out from an outer layer pattern 9 connected with one of the pair of IVHs 6 and subjected to gold plating. Subsequently, the prepreg 4 on the inside of the IVH 6 is drilled with a diameter larger than the hole 7 but smaller than the IVH 6 thus removing the plated lead connecting the IVH 6. |
