发明名称 Gate wiring of DMOSFET.
摘要 <p>A semiconductor device has a first conducting type semiconductor substrate (21 and 22), a plurality of second conducting type first semiconductor regions (27) formed on one part of the surface of the first conducting type semiconductor substrate, a first conducting type high density diffused second semiconductor region (28) formed on one part of the surface within the second conducting type first semiconductor region (27), a gate electrode material (26) extending across one part of the surface of the first conducting type semiconductor substrate (21 and 22), where one part of the surface of the first conducting type high density diffused second semiconductor region, and the second conducting type first semiconductor region (27) are not formed, an insulating film which covers the gate electrode material, a metal source wiring connected to the first conducting type high density diffused second semiconductor region (28), and the second conducting type first semiconductor region (27), a metal gate wiring (23) connected to one part of the surface of the gate electrode material (26) through an open section provided in the insulating film, and a second conducting type third semiconductor regions (24) formed as a plurality of partitions on the surface of the first conducting type semiconductor substrate (21 and 22) on the lower part of the metal gate wiring. In the semiconductor device, the second conducting type third semiconductor region (24) is positioned to approach the limit reached by a depletion layer extending from the second conducting type third semiconductor region (24) to the first conducting type semiconductor substrate (21 and 22). &lt;IMAGE&gt;</p>
申请公布号 EP0587176(A2) 申请公布日期 1994.03.16
申请号 EP19930114567 申请日期 1993.09.10
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 YONEDA, TATSUO;SUZUKI, KAZUAKI
分类号 H01L29/10;H01L29/423;H01L29/78;(IPC1-7):H01L29/784;H01L29/60 主分类号 H01L29/10
代理机构 代理人
主权项
地址