发明名称 DATA MULTIPLEX DEVICE
摘要 <p>PURPOSE:To shorten a synchronization recovery time and to prevent the deterioration of transmission efficiency at the same time by varying the bit width of a frame synchronizing signal and extending the bit only in the case of the synchronization recovery. CONSTITUTION:At the normal time when the frame synchronization is in a synchronizing state, 1-bit synchronizing pattern 103 is sent from a synchronizing pattern generating device 1. A selector 3 selects and transmits a control data signal 102. At pulling out of synchronism, the selector 3 selects and transmits an n-bit synchronizing pattern 105 of a synchronizing pattern generating device 2 based on a detection signal 108 from a detector 6. Thus, an opposite station transmits the n-bit synchronizing pattern, which is inputted in a detector 7. The detector 7 outputs a detection signal 109 and a re-synchronization section 8 performs re-synchronization. The re-synchronization is performed based on the n-bit synchronizing pattern, the recovery time can be shortened.</p>
申请公布号 JPH0669899(A) 申请公布日期 1994.03.11
申请号 JP19920222358 申请日期 1992.08.21
申请人 NEC CORP;NEC SHIZUOKA LTD 发明人 YAMAGUCHI YASUHIRO;MATSUI NOBORU
分类号 H04J3/00;H04J3/06;H04L7/08;(IPC1-7):H04J3/06 主分类号 H04J3/00
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