发明名称 Circuit for matrix calculation of discrete cosine transformation
摘要 A circuit for a matrix calculation of the discrete cosine transformation includes a read only memory, multipliers, summing devices, registers, selectors and a control unit. The multiplication and the summing calculations, with regard to one input data, are successively carried out by using a plurality of transformation coefficients of discrete cosine transformation read from the read only memory, row elements of the matrix of discrete cosine transformation are obtained by carrying out, a number of times equal to the number of row elements, the processes successively updating the registers based on the result of the calculations, and all the row and column elements of the matrix of discrete cosine transformation are obtained by carrying out, a number of times equal to the number of column elements, the calculations.
申请公布号 US5291429(A) 申请公布日期 1994.03.01
申请号 US19920845934 申请日期 1992.03.06
申请人 FUJITSU LIMITED 发明人 IWAMA, MASAHIRO;KAWAI, OSAMU
分类号 H04N1/41;G06F17/14;G06T1/20;H04N7/30;(IPC1-7):G06F7/38 主分类号 H04N1/41
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