| 摘要 |
A method of making dynamic random access memory cells having stacked capacitors of fin structures enabling the extension of the capacitor regions, irrespective of the used design rule. The method uses insulation layers having different etch selectivities, in order to extend the area of capacitor regions. The method comprises the steps of depositing three insulation layers on a semiconductor substrate, etching the uppermost insulation layer partially and then wet etching the intermediate insulation layer to remove its exposed portions completely and its hidden portions disposed beneath the third insulation layer partially to a predetermined length for extending the area of capacitors regions. The wet etch time of the insulation layers are controlled to control the etched length. With this extension of the area of capacitor regions, the buried contacts are formed by wet etching and are stable. Also, the number of mask processes is reduced, thereby enabling the manufacturing process to be simplified.
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