| 摘要 |
PURPOSE:To provide the scan inserting method which can generate function description language of a logic circuit having a scan by only logic of an ordinary circuit. CONSTITUTION:In a first step 102, a register (flip-flop) sentence in function description language is retrieved. In a second step 104, a truth value table of its retrieved register circuit is generated. In a third step 107, it is decided whether a holding signal exists or not based on the truth value table generated in a second step. In fourth steps 108, 109, a description part for outputting a signal from a combination circuit is converted so that a signal from the register circuit of the pre-stage is output at the time of shift, and a signal from the combination circuit is outputted as it is at the time other than shift. |
