发明名称 576KHZ CLOCK GENERATION CIRCUIT
摘要 <p>PURPOSE:To provide a small-sized 576kHz clock generation circuit with high reliability by constituting the clock generation circuit with a digital circuit relating to a circuit for generating 576kHz clocks by frequency-dividing the clocks of a frequency 19.44MHz. CONSTITUTION:This circuit is provided with a frequency divider circuit 10 for 33-frequency dividing and 34-frequency dividing the clocks of the frequency 19.44MHz and a control circuit 20 for synchronizing with 8kHz frame pulses and controlling the frequency dividing operation of the frequency divider circuit 10. Then, the 576kHz clocks synchronized with the 8kHz frame pulses are generated.</p>
申请公布号 JPH0653952(A) 申请公布日期 1994.02.25
申请号 JP19920205815 申请日期 1992.08.03
申请人 FUJITSU LTD 发明人 SEKIYAMA SHIGEO
分类号 H04L7/08;(IPC1-7):H04L7/08 主分类号 H04L7/08
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