| 摘要 |
PURPOSE: To provide new large scale parallel processors and a computer system. CONSTITUTION: Parallel array processors for large scale application are formed by a low output CMOS with a DRAM processing mechanism and incorporate processing elements on a single chip. Eight processors on the single chip are provided with a processing element, a large scale memory and input/output mechanism connected to itself and mutually connected by a corrected topology based on the hyper cube. Next, these nodes are mutually connected by a hyper cube network topology, correction hyper cube network topology, a ring network topology or a ring in ring network topology. |
