发明名称 Low power shift register circuit
摘要 A logic circuit for outputting signals corresponding to an input signal depending on a clock signal sent from an external source includes at least one synchronous flip-flop being synchronized with the clock signal, so that the flip-flop latches the input signal, and a unit for controlling an input of the clock signal to the flip-flop based on a difference between logic levels of an output signal of the flip-flop and an input signal newly latched by the flip-flop.
申请公布号 US5289518(A) 申请公布日期 1994.02.22
申请号 US19920831341 申请日期 1992.02.05
申请人 SHARP KABUSHIKI KAISHA 发明人 NAKAO, TOMOAKI
分类号 G11C19/00;H03K3/02;H03K5/15;(IPC1-7):H03K3/284;H03K19/00 主分类号 G11C19/00
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