发明名称 MOUNTING CYCLE TIME SIMULATION METHOD
摘要 PURPOSE:To easily obtain the cycle time balance on a line by calculating the mounting cycle time in consideration of a loading time, a substrate recognition time, a head free time, a component standard mounting cycle time, and an X-Y table and Z-axis wait time. CONSTITUTION:A processing 1 for inputting mount position information, a processing 2 for inputting component array information, a processing 3 for inputting facility catalogue information, a processing 4 for calculating an X-Y movement cycle time at each mount point by facilities, a processing 5 for calculating Z-axis movement tact, and a processing 7 for outputting the mounting cycle time and a simulation output through a processing 6 for calculating a moving cycle time at each mounting point by comparing the cycle time of the processes 4 and 5 are performed in order. This mounting cycle time simulation method precisely calculates in consideration of the loading time, substrate recognition time, head free time, component standard mounting cycle time, and X-Y table and Z-axis wait time by using a chip component mounting machine which puts many kind of components in a cassette and mounts it on a component supply part.
申请公布号 JPH0644208(A) 申请公布日期 1994.02.18
申请号 JP19920198124 申请日期 1992.07.24
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YOKOMORI TADASHI
分类号 B23P21/00;B65G61/00;G05B19/418;G06F19/00;G06Q50/00;G06Q50/04;H05K13/04 主分类号 B23P21/00
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