A METHOD AND A DEVICE FOR GENERATING A CLOCK SIGNAL IN A MULTIPLEXING SYSTEM

摘要

The invention relates to a method and a device for generating a clock signal in a multiplexing system, to which are applied several incoming signals, whereby the clock frequency of each signal may be a specific basic frequency or a multiple thereof. According to the method the clock frequency of one incoming signal is selected to be a source of a new clock frequency to be generated, and a second clock signal depending on the selected incoming signal is applied to a phase-locked loop (23) acting as a frequency multiplier, whereby the desired clock signal is generated by multiplying said second clock signal by means of the phase-locked loop by a desired multiplier. To make it possible to synchronize the output signal with signals in a wide frequency range in such a way that the accuracy of the frequency of the output signal is independent on the clock frequency of the signal with which the output signal each time is synchronized, said second clock signal is generated, in response to the selection made, by dividing (22) the clock signal corresponding to the selected incoming signal by a factor equal to the ratio of the clock frequency of the selected incoming signal to said basic frequency.