发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To obtain a semiconductor integrated circuit device, which can apply a scan-test method in test-pattern detection without decreasing the test-pattern detecting rate. CONSTITUTION:This device is constituted of an application circuit 2, wherein scan tests can be applied, a non-application circuit 4, wherein the scan tests cannot be applied, and a control circuit 3, which is provided between the application circuit and the non-application circuit. The control circuit 3 has a F/F group (flip-flop for the scan test), a multiplexer 10, an F/F group 8 and a multiplexer 9. The F/F group 7 receives the signal from the scan-test application circuit. The multiplexer 10 selects the output signal of the F/F and the signal from the test-scan application circuit and supplies the selected signal into the scan-test non-application circuit. The F/F group 8 receives the signal from the scan-test non-application circuit. The multiplexer 9 selects the output signal of the F/F and the signal from the scan-test non-application circuit and supplies the selected signal into the scantest application circuit.
申请公布号 JPH0618632(A) 申请公布日期 1994.01.28
申请号 JP19920195985 申请日期 1992.06.30
申请人 NEC CORP 发明人 HIRASAWA MASAO
分类号 G01R31/28;G06F11/22;H01L21/66;H01L21/822;H01L27/04 主分类号 G01R31/28
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